How to use first_match in assertion

SystemVerilog
, ,
2

In reply to PatilAkshay:

Hello, PatilAkshay.
Try to use SystemVerilog method $fell() instead. For example:


assert_check_after_reset : assert property(
    @(posedge clk)
    $fell(reset) |-> (datain == 0)
);

Best regards, Maksim.