How to use class variables inside an assertion module?

SystemVerilog
,
3

In reply to rajan passionate:

Hi,

Assign / Copy the config variable which you want to use inside a property to a local variable. Like this.

module i2c_assertions();
...
int data_tran_RD;
int data_tran_WR;
int slave_addr_tran;
...
always@(clk)
begin
  . . .
  data_tran_RD    = cfg.data_tran_RD;
  data_tran_WR    = cfg.data_tran_WR;
  slave_addr_tran = cfg.slave_addr_tran;
  . . .
end
 . . .
property p5;
  @(posedge I2C_INTERFACE.scl)
  s1|=> ( slave_addr_tran == 1'b1 );
endproperty : p5
 . . .

endmodule : i2c_assertions

This should help…