How to set_sequencer & adapter for the default maps present in the sub-blocks, which is instanced inside top level register blocks?

UVM
5

In reply to desperadorocks:

Don’t quote me on this, but I think the moment you instantiate your sub-blocks in your top level block and map the sub-maps in the big map, that will become the default map through which all register accesses are started, regardless of hierarchy. You probably don’t have a sequencer set for this map.

Since you want access through different maps (i.e. bus interfaces), I think you need to pass the corresponding map to ‘write(…)’ or ‘read(…)’ explicitly:


qr_reg_model.D0.R_D_CLR_ADDR.write(status, 15, .map(qr_reg_model.D0.default_map), .parent(this));