In reply to chr_sue:
with tlm_analysis fifo connections are compiled but It is hanging in forever loop of the sequence
Please find the sequence
typedef class mcu_base_seq_c;
class interrupt_sequence extends mcu_base_seq_c;
interrupt_transaction intr_item;
`uvm_declare_p_sequencer(interrupt_sequencer)
uvm_object_utils (interrupt_sequence) // uvm_event_pool ev_pool = uvm_event_pool::get_global_pool(); // uvm_event ev; //interrupt_transaction intr_item; //uvm_declare_p_sequencer(interrupt_sequencer)
function new(string name = “interrupt_sequence”);
super.new(name);
intr_item = interrupt_transaction::type_id::create(“intr_item”);
endfunction
task body();
bit [31:0] intr_data;
forever begin
// wait for a txn from monitor fifo.get() → it’s a blocking statement
p_sequencer.intr_fifo.get(intr_item);
`uvm_info(“DATA FROM Mon_Seq”, $sformatf(“DATA received from RX MONITOR is : [%p] \n”, intr_item.interrupt),UVM_LOW)
// DO your logic and send the txns to sequener again
if(intr_item.interrupt[0]) begin
axi_read(“INT_STATUS_INIT”,intr_data, 0, “CTL”);
if(intr_data == 1) begin
axi_write(“INT_MASK_INIT”,0, 0, “CTL”);
end
end
end
// `uvm_info("DATA FROM MON", $sformatf("DATA received from Interrupt MONITOR is : [%p] \n", intr_item.interrupt),UVM_LOW)
endtask
endclass