In reply to agiulietti:
The
bind construct inserts instances into your design. It cannot be used to replace them.
The easiest alternative would be to modify the compilation file path to point to the actual module you want compiled in. You can set up links or environment variables to help there.
Another option is get your two module versions compiled into two different libraries and have the search path specify which library to pick it up from, or use Verilog config block the specify explicitly which library to use. The use of libraries involves some tool specific details. You’ll need to look up that information in your tool’s documentation.