How to randomize 2 dimensional dynamic array in SystemVerilog

In reply to dave_59:

Hi Deve,

Thanks for the reply. I will reprase my question.

I need to know how to constraint the size of the array by using some other random vaiables which are randomized before these array.

For Example : -

class A

rand bit [11:0] width [];
rand bit [11:0] height [];

rand bit [11:0] rows_cols [][];

constraint width_cst {
 width.size() inside{[100:500];
 height.size() inside {[200:700]};
constraint c {foreach (rows_cols[ii,jj]) {
          rows_cols[ii,jj].size inside {[width:height]}; // applies to every element