How to Make an array of extended class (a list of test)

SystemVerilog
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2

In reply to jflarin:

SystemVerilog has syntax to do exactly this using the class scope operator.

array_of_test[0] = Test0001::new(cpu);
array_of_test[1] = Test0002::new(cpu);
array_of_test[2] = Test0003::new(cpu);

You will also need to make the run task a pure virtual method in your base class.

virtual class CTest;
    string name; 
    virtual cpu_if zcpu; // l'interface CPU
 
    function new(string name, virtual cpu_if zcpu);
        this.name       = name;
        ...
    endfunction
 
    task processor_startup; // common to all tests
 
    endtask
    pure virtual task run;
endclass : CTest

This virtual class CTest is not allowed to be constructed directly, and any extension to it must define a run task.