I am looking for an efficient and portable way to identify and print the caller of a task in SystemVerilog. Specifically, I am not referring to the immediate parent (like get_parent_name() in uvm).
SystemVerilog do have $stacktrace, but:
it just print, doesn’t return string.
it print the whole hierarchy, and I want only the caller.
I wonder if there are any recommended techniques or workarounds that can achieve this functionality in a clean and reusable manner.
If anyone has encountered this challenge and found a robust solution, I would greatly appreciate your insights or examples.
$stacktrace was just officially added to the 1800-2023 LRM. It can be called as a system task or function returning a string. Ask your simulation vendor to support it. If you only want the call of the task you will still need to parse the string. You may also need to turn on some debugging switches since identifier names normally don’t get saved as part of compilation.
Alternative solutions:
pass the name of the caller as an argument to the task
Create a C routine using the VPI to get the call stack information from the simulation database.