How to fork multiple forever blocks with for loop

SystemVerilog
, , ,
7

In reply to NaveenReddy:

In reply to dave_59:
Thanks Dave for the suggestion.
will the fork waits for all the three forever loops to join?
Also, in some post I read you suggesting to use it like below #1
what would be the best way to use #1 or #2 ?


// #1
forever @(posedge m_vif.uclk iff xyz[i] == 1) begin
//code
end
//#2 
forever begin
@(posedge m_vif.uclk iff xyz[i] == 1);
//code
// Question: is this way #2 correct or should the code be embedded in begin end blocks ?
end

Dave pardon me for bugging more on this thread.
if I want the iff condition to be applied to all the below lines
will the #2 method i wrote below works?


//#1 is straight forward since the code will be embedded in begin end blocks
//#2 but in this, the iff condition is terminated by ; and the following statements are not
// enclosed in begin end blocks. so, in that case, how would the code behave?
forever begin
  @(posedge m_vif.uclk iff xyz[i] == 1);  //no begin end block here. so i believe this would only be applied to the immediate if condition here. Please correct me if I'm wrong
    if(!Flag[i]) begin
      wait_time[i] = getWaitTime();
      Flag[i] = 1;
    end
    memclk_cycle[i] += 1;
    if (memclk_cycle[i] == wait_time[i]) begin
      Flag[i] = 0;	
      memclk_cycle[i] = 0;
      xyz[i] = 0;
    end
end