How to define methods for multiple blocking put imp's in a single component

UVM
, ,
2

In reply to bhargav_1909:

From uvm_tlm_defines.svh ::


//Define two new put interfaces which are compatible with uvm_put_ports and uvm_put_exports.

`uvm_put_imp_decl(_1)
`uvm_put_imp_decl(_2)

class my_put_imp#(type T=int) extends uvm_component;
   uvm_put_imp_1#(T) put_imp1;
   uvm_put_imp_2#(T) put_imp2;
   ... 
   function void put_1 (input T t); 
     //puts comming into put_imp1
     ... 
   endfunction
   function void put_2(input T t); 
     //puts comming into put_imp2
     ... 
   endfunction
endclass