How to define cross coverage for the selected range

SystemVerilog
11

In reply to dave_59:

Hello Dave,

Could you please let me know the difference between these two lines?

c1: cross a,b
	{ignore_bins ib = ! binsof(a) intersect {[2:5]} || ! binsof(b) intersect {[3:6]}; //1

        ignore_bins ib =  binsof(a) intersect {[2:5]} &&  binsof(b) intersect {[3:6]};} //2

I am a bit confused about the !binsof and binsof in ignore bins. Thanks