In reply to chr_sue:
Designers gives the RDF file (where each registers field and value are defined ).
Example
REG ABC : 0x648 {
FIELD SEL_POL S_RO C_RW 0 init=0x0
%
FIELD MASK S_RO C_RW 15:3 init=0x0
FIELD ADDR S_RO C_RW 31:19 init=0x0
};
For above register WR_MASk AND RD_MASK will be (THis is the input file for us given by designer)
define ABC_REGRSTVAL 0x0UL
define ABC_REGWRMASK 0xFFF8FFF9UL
define ABC_REGRDMASK 0xFFF8FFF9UL
Now if i give WR_DATA (item.data) 0xFFFFFFFF to abc REG then i will get rd_data (from design) (WR_DATA & REGWRMASK )but as per your implemention expected rd_data will be 0xFFFFFFFF (item.data). so it will give mismatch.
I hope now it is clear