How to constrain the 2nd dimension of a 2D array in systemverilog

SystemVerilog
8

Hi Dave,

Though I have restricted

constraint C3{foreach(mem[,j]) mem.sum() with (int'(mem[item.index][j])) != 4 ;}//column

The output is
value is ‘{’{'h1, 'h1, 'h1, 'h3, 'h3}, '{'h3, 'h1, 'h1, 'h1, 'h1}}
sum of 1st column is 4

Please let me know if thIs it toll issue /code issue

Thanks,