In reply to chr_sue:
In reply to UVM_SV_101:
Thanks. But where is your problem?
Your req conatins both input and output data.
But I do not believe you want to randomize valid, ready, out_valid and data_out.
I believe valid, ready and valid_out do not belong to the transaction. They are signals in your virtual interface.
Your req in transaction monitors the data members aadr, daat_in and cmd.
And the rsp especially data_out. There ios nothing to combine.
But I believe you need a tlm_fifo to stote the req.
Hi,
More information on why I need to combine req, rsp:
- Rsp comes OOO out of order so I plan to store req in associative array index- tran_id.
- rsp does not have valid data in “addr” signal.
- There are more signals in req (I havent shown here in the seq_item), which needs to be send ahead through analysis port
Hence I plan to combine the req, rsp and then send it ahead.
Do you have any suggestion how I can combine these two seq_item and send them through single analysis port?
thnks