How to check that a Signal was NEVER HIGH or NEVER RISE during the simulation?

In reply to Srini @ CVCblr.com:

Hi,

Firstly, thank you for the prompt reply.

I want to use “stream_synchronised” as a neg edge reset signal i.e. I believe I have the correct use (I can never be sure! :). The “dec_error” signal is all but certain to go high if my “stream_synchronised” signal goes low. However, I don’t want the assertion to produce an error in that case. I do want it to produce one if I dec_error == 1 whilst the stream_synchronised == 1.

As for clocking, I presume you refer to the lack of clocking block in that property - all other properties use a defined clocking but this is a slightly odd one.

Regarding the cover property - thanks for the tip and I will look into the documentation.

Thanks for you help!

Svet