In reply to SATYA369:
Each simulator vendor is free to implement the new method any way they see fit, so long as it conforms to the LRM. Its performance characteristics should not typically influence how you write your SystemVerilog code.
In reply to SATYA369:
Each simulator vendor is free to implement the new method any way they see fit, so long as it conforms to the LRM. Its performance characteristics should not typically influence how you write your SystemVerilog code.