In reply to dave_59:
Dave, Can i assign a value to a net(which is inside) from a class based testbench?
interface a2b;
wire w1; // w1 is a bi-directional signal
endinterface
class a2b_dr;
virtual a2b inf;
....
task dr;
inf.w1 <= 1'b1;
endtask
endclass
Currently this is allowed in vcs. I would like to understand the reason for not using this kind of code? (When class is not driving the signal the default value of net is “z”. and from the class we can drive “z” on this w1 signal)
Every time there is a change on one of the drivers, the function is called to produce a resolved value. The function is created at elaboration (before simulation starts) and is based on the kind of net type, wand, wor, tri1, etc.
The above statement means that tool will not be able to consider the dynamic assignment(which is created during simulation) for value resolution?