Generating multiple non overlapping chunks of memories from a given big memory

SystemVerilog
, ,
7

Thanks for the reply.I tried below code and its working as expected.


parameter min=0;
parameter max=15;
module line_example;
class line;
  rand int unsigned x_start;
  rand int unsigned x_end;
  constraint line_c {
    x_start inside {[min:max]};
    x_end inside {[min:max]};
    x_start < x_end;
  }
endclass


class line_generator;

  rand line line_h[5];
  function new();
    foreach(line_h[i])
      line_h[i]=new();
  endfunction
  constraint c1 {
   foreach (line_h[i])
    {
      foreach(line_h[j])
	 { 
       (i!=j)->!(line_h[i].x_start inside {[line_h[j].x_start:line_h[j].x_end]});
       (i!=j)->!(line_h[i].x_end inside {[line_h[j].x_start:line_h[j].x_end]});
     }
    }
    }
endclass
line_generator gen;
initial
  begin
    gen=new();
	  gen.randomize();
	  foreach(gen.line_h[i])
	  $display("%p",gen.line_h[i]);
  end
endmodule

solution:
'{x_start:'hd, x_end:'hf}
'{x_start:'h8, x_end:'hb}
'{x_start:'h3, x_end:'h4}
'{x_start:'h0, x_end:'h1}
'{x_start:'h6, x_end:'h7}