Verification Academy
Generate Pattern 2, 33, 222, 5555, 22222, 777777 using constraints
SystemVerilog
SystemVerilog
,
systemverilog-constraint
bachan21
February 20, 2021, 8:43am
3
In reply to
dave_59
:
Yes.
Next output is 222222222 followed by 11111111111111111111 so on
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