In reply to hk123:
Making it a static function means you never have to construct an instance of class C. It also makes it synthesizable. See section 13.8 Parameterized tasks and functions in the IEEE 1800-2017 SystemVerilog LRM
I’m assuming the one $display in your abc function is not what you really want to do. What you really want to do could have a profound impact the the way to handle this.
module automatic top;
typedef bit bitstream_t[$];
function void abc(input bitstream_t data0, data1);
bitstream_t result;
string hexresult;
if (data0.size != data1.size) $fatal("You have a problem");
// computing data0 ^ data1 with a dynamic array is trivial
foreach(data0[i]) result.push_back(data0[i]^data1[i]);
// displaying the result as a single hexadecimal number is more complicated
while(result.size%4!=0) result.push_front(0);
for(int i = 0;i<result.size-1;i+=4)
hexresult = $sformatf("%s%h", hexresult, 4'(result[i+:4]));
$display("The value of data:%s", hexresult);
endfunction
task a();
bit [5:0]a0, b0='h2a;
abc(bitstream_t'(a0),bitstream_t'(b0));
endtask
task b();
bit [10:0]a0, b0='h123;
abc(bitstream_t'(a0),bitstream_t'(b0));
endtask
task c();
bit [127:0]a0, b0=128'h12345678A;
abc(bitstream_t'(a0),bitstream_t'(b0));
endtask
initial begin
a;b;c;
end
endmodule