Full chip verification methodologies

Thank you all for the comments. I still have these questions unanswered though.

  • What is the stimulus that the software guys should be giving?
  • Can a full-chip verification environment be built from purely UVM, without the use of any other languages like C/C++. Any performance issues?
  • Whether the stimulus is on-the-fly or offline generated etc
  • Should the checking be on-the-fly or post processing.
  • What things need to consider, what should be the approach