Formal verification: Assertion taking longer time to prove

@(posedge clk )
A |-> ##[3:15] B

I wanted to ask, this type of property is taking lot of time to prove in my formal tool . What could be possible reasons , and what should i dig more into

This might be a tool specific issue, or at least require tool specific knowledge to debug. This Mentor/Siemens EDA sponsored public forum is not for discussing tool specific usage or issues. Please read your tool’s user manual or contact your tool vendor directly for support.