Fork Label Not Getting Disabled

SystemVerilog
,
1

Hi Everyone

// With Xcelium, we are observing fork with labels not getting disabled with disable <label> 

initial begin

  fork : check
    begin
      repeat(10) begin
      #1ns;
      $display("Done 1 at time = %0t", $time);
      end
    end
    begin
      repeat(5) begin
      #1ns;
      $display("Done 2 at time = %0t", $time);
      end
    end
  join_any

  disable check;
end

Output: Here the first begin/end if not getting killed

Done 1 at time = 1
Done 2 at time = 1
Done 1 at time = 2
Done 2 at time = 2
Done 1 at time = 3
Done 2 at time = 3
Done 1 at time = 4
Done 2 at time = 4
Done 1 at time = 5
Done 2 at time = 5
Done 1 at time = 6
Done 1 at time = 7
Done 1 at time = 8
Done 1 at time = 9
Done 1 at time = 10

Case 2 :

initial begin

  fork : check
    begin
      repeat(10) begin
      #1ns;
      $display("Done 1 at time = %0t", $time);
      end
    end
    begin
      repeat(5) begin
      #1ns;
      $display("Done 2 at time = %0t", $time);
      end
    end
  join_any

  disable fork;
end

Output: Here the first begin/end is getting killed

Done 1 at time = 1
Done 2 at time = 1
Done 1 at time = 2
Done 2 at time = 2
Done 1 at time = 3
Done 2 at time = 3
Done 1 at time = 4
Done 2 at time = 4
Done 1 at time = 5
Done 2 at time = 5

2

If you run your code on EDA Playground, 3 of the 4 simulators will give you the results you are expecting, and one will not, possibly due to a tool issue.

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