Facing warming on coverage syntax

In reply to Rahulkumar:

In reply to bachan21:
Check analysis port declaration in monitor/component where bist_coverage import is connected.
While declaring port need to define type of sequence item which will be transported through it.


https://www.linkedin.com/in/patel-rahulkumar/

Attaching the declaration for your ref.

uvm_analysis_port#(bist_engine_sequence_item) bist_mon_port;

The same class has been used to parameterize the connection. So i don’t think that’s the issue.