Driving a DUT input port from the testbench

UVM
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4

In reply to chr_sue:

In reply to UVM_learner6:
Could you please explain how your design is starting without an input? Most designs need a certain input to prduce an output.

This is a final “done” to the DUT. The DUT is already running. TB needs to mimic “done” coming from another block that is connected to DUT.