Driver sequencer communication in uvm

HI could you please explain me or point me to the souce for driver and sequencer communications. sometimes I come across fifo are there in sequencer.sometimes I come across fifos are not there in sequencer.Could you please provide me the clear picture for it.

Thanks

A TLM FIFO in a sequencer is often used for a sequence to modify an Item before the driver gets the item, such as error injection or for agent layering.
you can connect a tlm_port to the TLM_FIFO analysis_export

this is done by using the handle to the p_sequencer in your sequence.

`uvm_declare_p_sequencer(<sequencer_type>)
  p_sequencer.get_next_item(my_item)


start_item(my_item);
<code to modify/randomize item here>
finish_item(my_item);

Hi ,

Thanks for inputs. so there is a TLM fifo sitting between sequence and driver in sequencer. could you please clarify is it correct? If so what could be its size ? how many sequence items can be placed in a TLM fifo by sequence before response can come from driver?

Thanks

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@dave_59 is answering your question.
after re-reading the question I see I was answering something else - sorry