Determining the bit width of operands in constraint

SystemVerilog
, , ,
1

Hi Moderators,

I was trying a few variations of a simple addition operation in a SV constraint.
In edalink all constraints give desired results except SUM4

As per my understanding

Bit widths of operands and any intermediate expressions are determined before applying any operators

(Q1) In SUM4 wouldn’t both 2-bit operands be extended to 32-bits ?
I am not clear on reason behind it’s failure ?

(Q2) How does SUM4 differ fromSUM2 , SUM3 and SUM5 ?

3

A cast is treated as an assignment to a temporary variable of the destination type. The expression inside the cast is only relevant within that assignment and does not involve the types used in the resulting expression.

4

Hi Dave,

I was referring to LRM 1800-2023 6.24.1 which says

In a static cast, the expression to be cast shall be enclosed in parentheses
that are prefixed with the casting type and an apostrophe.
If the expression is assignment compatible with the casting type, 
then the cast shall return the value that a variable of the casting type would
hold after being assigned the expression. 

When changing the size, the cast shall return the value that a packed array type
with a single [n-1:0] dimension would hold after being assigned the expression,
where n is the cast size. 
The signedness shall pass through unchanged, i.e. the signedness of the result
shall be the self-determined signedness of the expression inside the cast.
The array elements shall be of type bit if the expression inside the cast is 
2-state, otherwise they shall be of type logic.

(A) Here is my interpretation of your quote

// As 'a' and 'b' are bit type, 2'( a + b ) would be equivalent to
   bit [1:0] temp_var; // Due to 2' cast

   temp_var = a + b;

// Now the 32' cast is applied to temp_var where 30 zeroes are appended

   { 30'b0 , temp_var } == 32'd6

(B) In all the other constraints the 32-bit size cast is applied to both variables. Hence there is no overflow

Please correct me if I am wrong about (A) / (B)

5

Hello Sir,

Could you please explain the above statement using a small example if possible ?

6 
module top;
  
  bit [1:0] A,B,C;
  
  initial begin
    A = 3; B = 3;
    C = (A + B) >> 1;
    $displayb(C,, A,, B);
    C = ( (A + B) + 0) >> 1;
    $displayb(C,, A,, B);
    C = ( 2'(A + B) + 0) >> 1;
    $displayb(C,, A,, B);
  end
endmodule

Displays
01 11 11
11 11 11
01 11 11

The addition of (A + B) is evaluated as a 2-bit expression, resulting in truncation of the result. In the subsequent addition, the result is evaluated in a 32-bit expression because the 32-bit 0 is now included. However, due to the cast in the third expression, the addition is truncated again because of the casting to 2 bits.