Hi all,
I have similar problem and I have implemented source code with all above pointed suggestion in the thread. still have difficulty in sending slave reactive response to driver.
From my debug analysis, code from driver component in step:2 was executing , but it was getting different transaction object with 2’nd get_next_item call than the response transaction which is prepared by wb_transaction_resp_basic_seq and then control executing 2’nd item_done call successfully. from the wb_transaction_resp_basic_seq side, I would not see any display messages after executing start_item(rsp);.It means control is not entering back to wb_transaction_resp_basic_seq. If it enters, I would have seen printing of those messages in the simulation log file.
Here is my code snippet, would you have any other suggestions why it is not getting displayed messages from WB_SLAVE_RSP_TR1,WB_SLAVE_RSP,WB_SLAVE_RSP_TR2 and why test is hanging?
class wb_transaction_resp_basic_seq extends uvm_sequence #(wb_transaction);
virtual task body();
forever begin
req = wb_transaction::type_id::create("req");
rsp = wb_transaction::type_id::create("rsp");
start_item(req)
finish_item(req);
`uvm_info("WB_SLAVE_REQ_TR", {"Request: ", req.sprint()}, UVM_HIGH);
if(req.m_kind == wb_transaction::WRITE)
ram[req.m_addr] = req.m_data;
`uvm_info("WB_SLAVE_REQ_TR", {"starting response : "}, UVM_HIGH);
//response traction preparation based on req transaction
start_item(rsp);
**rsp.copy(req);
`uvm_info("WB_SLAVE_RSP_TR1", {"Response: ", rsp.sprint()}, UVM_HIGH);
if(!rsp.randomize() with {if(rsp.m_kind == wb_transaction::READ) (rsp.m_data == 32'hABCD_EFAB);}) //just hard coded to see transaction flow
`uvm_fatal("WB_SLAVE_RSP", "after randomization");
finish_item(rsp);
`uvm_info("WB_SLAVE_RSP_TR2", {"Response: ", rsp.sprint()}, UVM_HIGH);**
end
endtask
endclass
class wb_slave_driver extends uvm_driver **#(wb_transaction,wb_transaction);**
task wb_slave_driver::main_phase(uvm_phase phase);
wb_transaction wbreq,wbresp;
forever begin
//1 step: preparing req seq to send back to slave response sequence
this.seq_item_port.get_next_item(wbreq);
//some protocol data
wbreq.m_addr = this.sigs.adr;
if (this.sigs.we) begin
wbreq.m_kind = wb_transaction::WRITE ;
wbreq.m_data = this.sigs.wdat;
end else begin
wbreq.m_kind = wb_transaction::READ ;
end
this.sigs.ack <= 1'b0;
this.seq_item_port.item_done();
//2 step: getting slave response from wb_transaction_resp_basic_seq sequence
this.seq_item_port.**get_next_item(wbresp);**
if (wbresp.m_kind == wb_transaction::READ ) begin
this.sigs.rdat <= wbresp.s_rd_data;
end
@ (this.sigs.sck) this.sigs.ack <= 1'b1;
@ (this.sigs.sck) this.sigs.ack <= 1'b0;
this.seq_item_port.**item_done();**
endtask
endclass
class wb_slave_sequencer extends uvm_sequencer # **(wb_transaction,wb_transaction)**;
`uvm_component_utils(wb_slave_sequencer)
function new (string name, uvm_component parent);
super.new(name,parent);
endfunction:new
endclass:wb_slave_sequencer
Thanks,
Siva Sankar