Cross Coverage using Coverpoints with fixed bins

SystemVerilog
, ,
2

In reply to ce_2015:

The bins directive of a cross can only merge or ignore automatically generated cross-bins.

What you need to do is define two coverpoints with one bin instead of one coverpoint with two bins. Then define two crosses.

covergroup cvgrp;
   Address_pt : coverpoint tr.addr
   {
      bins ram_div [32] = {[`RAM_AddrFirst:`RAM_AddrLast]};  
   }
 
   Read_pt : coverpoint tr.Direction 
   {
      bins READS  = {READ};
   }
   Write_pt : coverpoint tr.Direction 
   {
      bins READS  = {Write};
   }
   ram_read : cross Address_pt, Read_pt;
   ram_write : cross Address_pt, Write_pt;

endgroup : cvgrp