In reply to Mahesh K:
Though you can do this in UVM - I suggest you think about coding these as sequences than tests - as sequences are more easier to reuse. Coming to the specific code snippet - you would extend:
class test2 extends base_test;
// override only main_phase
// Leverage build/connect etc. from base_test
// If you need base_test::run_phase use
fork
super.main_phase(phase);
join_none
HTH
Srini
www.verifworks.com