In reply to Shipra_s:
(i) Every class in SystemVerilog has a new() method constructor. If you don’t code one explicitly, SystemVerilog inserts one for you implicitly. You must call new() to construct a class object. The create() static method is defined by the UVM and it calls new() for you. Please see https://www.edn.com/design/systems-design/4461407/Inheritance-and-polymorphism-of-SystemVerilog-OOP-for-UVM-verification?rssid=2618c3e4-c775-f2c5-f5f7-d8058ff2b4c3
(ii) Do not use the 2nd way. Experiment with it if you want to learn more, but it is never used with the UVM.