Constraint

SystemVerilog
,
8

In reply to dave_59:


class Packet;
  rand int unsigned p[20];
  constraint c_stim{
      p.sum()==13;
    }
endclass:Packet
 
module test;
 
  Packet P=new;
  initial begin
    assert(P.randomize)
    $display("%p",P.p);
  end
 
endmodule

The result , I am getting -

vsim -voptargs=+acc=npr

run -all

'{257152500, 3154634279, 1845763276, 3696871621, 631626809, 2108533005, 2922957038, 2580893384, 1715310603, 828324944, 3022238876, 3785499950, 2835521728, 3653584145, 2354463875, 2745584841, 1287618582, 201913747, 2622534294, 698645476}

exit

As I am using unsigned , I was supposed to have 1s and 0s . Instead , I am these values.