Constraint

SystemVerilog
,
10

In reply to dave_59:

Hi dave,
I tried the code that u suggested, I get an error msg suggesting ‘item’ has not been declared yet.
“Error-[IND] Identifier not declared
randomise.sv, 13
Identifier ‘item’ has not been declared yet.”

class my_trans;
	bit[31:0]  reg_a [24];
constraint non_overlapping {
    foreach(reg_a[,j]) reg_a.sum() with (int'(item[j])) == 1;
  };


endclass

module ab;
	my_trans trans_h= new ;
	initial
	begin
		trans_h.randomize();
	end
endmodule

it is not picking up the coloumn, when I only put item there it does expand, but putting item[j] causes a compilation error.