Verification Academy
Constraint to generate values divisible by 5 in ascending order
SystemVerilog
constraint-randomization
,
SystemVerilog
,
systemverilog-constraint
,
ascending-order-constraint
,
divisible-by-5
Radheychin
July 18, 2023, 12:15pm
6
In reply to
Shashank Gurijala
:
Thank you Shashank! I will try using this.
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