Constraint Randomization Interview Question

SystemVerilog
21

Correct! I was solving for a problem which had 10 consecutive ones. Thanks for correcting

22

I tried the above problem as follows:

class abc;
  rand bit[31:0] addr;
  rand bit[31:0] shift;
  constraint addr_c{
   shift inside {[1:16]};
   addr == 10'b1111_1111_11 << shift; 
  }
  
    function void post_randomize();
    addr = ~addr;
      $display("arr == %b shift =%0p", addr, shift);
    endfunction
  
  
endclass: abc
    
    
    module tb;
      abc abc_inst;
      
      initial begin 
        abc_inst = new();
        repeat(10)
        abc_inst.randomize();
      end
      
      
    endmodule
23 
module test;
class constraints;
rand bit[31:0] data;

constraint seven_ones_c{
 $countones(data)  == 12;
}

//Solution-1
constraint ones_c{
  foreach(data[i]){
  if(data[i]==0)
    data[data[i] +: 9] == 10'b00_0000_0000; }
    };

//Solution-2
//rand int start_index;
//constraint index_c{
// start_index inside {[0:31-7]};
//}
//
//constraint final_c{
// data[start_index+:9] == 10'b00_0000_0000;
//}

function void post_randomize();
  $display("data=%b", data);
endfunction
endclass
constraints c;
initial begin
  c=new();
  c.randomize();
end
endmodule