Constraining address and memory locations

SystemVerilog
,
3

In reply to TC_2017:

I think the answer to [Q1] is no. Unless you only want one value at a time, and that value’s width is small, you can use randc.

For [Q2] you can use a foreach loop. (btw I think you meant to say that q1 holds the index values you want to randomize; q2 holds the index values you previously randomized)

constraint keep_values_outside_q1 {
    foreach (memory[index])
        !(index inside {q1}) -> memory[index] == const'(memory[index]); }