Constrain sum of elements in an array

SystemVerilog
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21

Hi ssureshgverifier,

This is not working, can you have a look once.

Thanks,

22

Below code is working.

module top();
  
  class simple;
    
    rand int unsigned arr[];
    
    constraint c_values{
      arr.size()==4;
      foreach(arr[i]){
        arr[i] inside{[0:100]}; 
      }
      arr.sum() with(int'(item))==40;
      arr.sum() with(4'(item>0 &&item%8==0))==4;
    
    }
    
  endclass
  
  initial begin
    simple s=new();
    s.randomize();
    $display("The values are = %0p", s.arr);
    
  end
endmodule
23

Hi,
I tried the above question with a added constraint that all values should be unique in the array. However, this results in conflicting constraints. Can somebody help me understand why adding uniqe{arr} constraint results in conflicting constraints.

module tb;
class sum_array;
  rand bit[33:0] arr[];

   constraint arr_c { arr.size() == 4;
                     foreach(arr[i]) { 
                       arr[i]%8 == 32'h0; 
                       arr[i] inside {[0:100]};
                     }
                     unique{arr};
                     arr.sum() == 32'h28;
                    // arr.sum() with (36'(item)) == 40;
                    }

   function void post_randomize();
                     //foreach(arr[i])
     $display("arr = %p", arr);                  
   endfunction
endclass

 initial
    begin
      sum_array c1;
      c1 = new;
      repeat(10)
      c1.randomize();
    end
 
endmodule
24

Look at the solutions without the unique constraint. Do you think there should be a solution with the unique constraint? What would that look like?

25

Understood, because of sum constraint, unique is giving conflicting constraints. Thanks