Constrain a 2D matrix in diamond fashion

SystemVerilog
,
5

In reply to Juhi_Patel:

Hi Juhi,
I appreciate your mathematical approach.
I have taken your logic and optimized the code.

class packet;
  rand bit data[8][8];
 
  constraint value {
    foreach(data[i,j]) {
      if (((i<=4) && ((j>2-i) && (j<i+5))) || 
          ((i>4) && (j>i-5) && (i+j <= 11)))
	data[i][j] == 1;
      else
	data[i][j] == 0;
    }
  }

  funtion void print();
    for(int i=0;i<8;i++)begin
      for(int j=0;j<8;j++)
        $write ("%0b\t",data[i][j]);
        $display();
    end
  endfunction : print
endclass : packet

module top();
  C c;
  initial begin
    c = new();
      if(!c.randomize()) $error("RAND FAILED --- !!!");
      c.print();
  end
endmodule : top