In reply to bmorris:
Am a bit confused on your terminology in this post but assuming you are using SV/SVA bind to a VHDL entity:
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Your first concern doesn’t sound valid as entity based binding is portable, you won’t need to change anything at all at integration level (unless you are using instance based binding)
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Your 2nd point is unclear - are you asking why should I add that checker? If so please don’t mind me asking - why would you verify at integration level if not to “check”? I am pretty sure you have something else in mind, sorry I’m missing it.
Srini
www.go2uvm.org