In reply to shatrish:
The blunt answer is SystemVerilog has a DPI that allows interaction between C code running on the same machine as the host simulation.
https://verificationacademy.com/forums/systemverilog/starting-dpi#reply-90358
For a better answer, you need to be a little more specific. Processors do not run C code, they run machine code instructions. Is your processor a high-level model, or written in RTL? What kind of communication are you looking for?