In reply to mayurkubavat:
I am not getting UVM fatal print, so which means I am getting virtual interface to monitor, right ?
Below you can see the top and interface. As you can see I have included hclk in interface. Any other reason for the cause of this issue ?
interface ahb_if (input bit hclk, hresetn);
bit [31:0] addr;
bit [31:0] dataQ;
bit wr_rd;
bit [2:0] burst_type;
endinterface
module top;
`include "test_lib.sv"
reg hclk, hresetn;
initial begin
hclk = 1'b0;
forever begin
#5 hclk = ~hclk;
end
end
initial begin // active low reset generation
hresetn = 1'b0;
repeat(10) @(posedge hclk);
hresetn = 1'b1;
end
ahb_if inf(hclk, hresetn); // instantiating interface
initial begin
uvm_config_db #(virtual ahb_if)::set(null,"*","phy_intf_var",inf); // registering physical interface to config_db with field name phy_intf_var
end
initial begin
run_test();
end
endmodule