In the configure_phase of my UVM testbench, I configure some registers and then spawn a monitoring thread using a forever loop inside a fork ... join_none block. This thread starts and waits for a specific design signal to go high. When simulation transitions from the configure_phase to the main_phase, will this background thread stay active, or will it be killed automatically by the UVM phase controller?
All processes created by a phase will get terminated when that phase ends. I highly recommend using only the run_phase() and then sequences to control the flow of your test bench.