Hi Forum,
In my UVM Tb I have an AXI Slave write sequence ::
virtual task body();
axi_txn wr_txn; // Same type as uvm_blocking_peek_imp
forever begin
// Calls TLM peek API in Slave Write Sequencer
p_sequencer.addr_ph_port.peek(wr_txn);
// Post unblocking the sequence sends BRESP for the axi_slave_wr_driver to drive
.....
end
endtask
The p_sequencer is of type axi_slave_wr_sequencer which has TLM connection to axi_slave_wr_driver via their parent component Write Agent’s connect_phase
Here’s a snippet of component axi_slave_wr_driver
uvm_blocking_peek_imp#(axi_txn,axi_slave_wr_driver#(`PARAMS) ) addr_ph_imp;
// Implementation of task 'peek'
virtual task peek( output axi_txn transfer );
wait( write_txn_q.size() ); // Pushed post both AW and WDATA handshake
transfer = write_txn_q.pop_front();
endtask
Note that back to back calls to peek API would give different AXI Write transactions
As per LRM Section 12.2.2.2 of UVM ( 2017 version )
12.2.2.2 get and peek
The get interfaces are used to retrieve transactions from other components.
The peek interfaces are used for the same purpose, except the retrieved
transaction is not consumed; successive calls to peek shall return the same object.
I have a few questions
(1) As the implementation of task peek in my Tb goes against this quote, I am trying to understand why is it required for back 2 back calls to peek API to retrieve the same object ?
I don’t believe that UVM throws an error if the above quote isn’t followed
(2) On what criteria does a user choose one over the other (uvm_blocking_peek_imp v/s uvm_blocking_get_imp ) ?
(3) In my Tb I could replace uvm_blocking_peek_imp with uvm_blocking_get_imp,right ?
A similar change would be required in axi_slave_wr_sequencer
Thanks in Advance