Checkers / models

In reply to ben@SystemVerilog.us:

I don’t like the term checker, because it is not specific enough. There are different kinds of checkers, one type is the scoreboard and the other one are assertion checkers. Both types are used to check different things. In most applications you will not be able to replace a work without a scoraboard, having only assertions-. The scoreboard provides you more or less an automaetd waveform compare. Properties are used to model design content and they are checking if this content was executed, including correct timing. The scoreboard checks different things.
A typical application for assertions/properties is the checking of bus protocols or FSM, searching for interrupts etc.