Change mirror value of a register field before running uvm_reg_hw_reset_seq

In reply to birenkumar:

In reply to chr_sue:
My intention is to change the mirrored value (which is 'h0 after reset) to the value which I write (as 'h3 in my Top Env) before running the hw_reset_seq.
So that I can avoid this Error :
So, basically my Idea is to override the mirrored value just after the read and just before the comparison takes place inside the hw_reset_seq for this register.
Hence, I am calling the predict() method inside the post_read() method.
Hope you got what I am trying to achieve here… :)
There might be one question in your mind that why am I writing to that register from the Top Env. The answer is that my Env needs to have that register written with that value ('h3) due to some setup requirement.

One thing you should note here is,
hw-rst-seq does model.reset() followed by reg.mirror().

From your env if you are writing 'h3 to register and followed by hw-rst-seq, then its expected that the register value to have 'h0. and there will be an UVM_ERROR in hw-rst-seq.

so if you don’t want that register to get affected by model.reset(), then you can skip that register else you can modify the register’s predict value before mirror() method as specified in hack-code and get your job done.