Cast to parameterized variable fails

SystemVerilog
, , , ,
6

In reply to dave_59:

Thanks for the solution. I will walk through the attached article but,

How about the below implementation which makes use of polymorphism without interface classes?
What is the difference? How to choose in between?

module top;
      typedef struct {int A;} some_def_type;
      class A;
      endclass

      virtual class abstract_policy#(type from_type, to_type);
          virtual function void copy(input from_type from, output to_type to);
          endfunction
        
	  virtual function logic compare(input from_type lhs, output to_type rhs);
          endfunction
      endclass
      
      class policy_struct#(type from_type, to_type) extends abstract_policy#(from_type, to_type);
        
        virtual function void copy(input from_type from, output to_type to);
              to = to_type'(from);
              $display("policy_struct");
      	endfunction
        
      endclass
      
      
      class policy_class#(type from_type, to_type) extends abstract_policy#(from_type, to_type);
          virtual function void copy(input from_type from, output to_type to);
            $cast(to,from);
            $display("policy_class");
          endfunction
      endclass
      
 
 
  class param_class #(type type_foo = some_def_type,
                    type type_bar = some_def_type,
                      type policy_t = abstract_policy#(type_foo, type_bar));
    type_foo foo;
    type_bar bar;
   	policy_t policy;
    
    function new();
      policy = new(); 
    endfunction
 
    function void some_func();
      policy.copy(bar,foo);
    endfunction
   endclass
 
   param_class#(some_def_type,
                some_def_type,
                policy_struct#(some_def_type, some_def_type)) h1 = new;
      
      param_class#(A,A, policy_class#(A, A)) h2 = new;
      

   initial begin
     h1.some_func();
     h2.some_func();
   end