Call to end_of_elaboration_phase function

Hi ,

I have a question regarding the end_of_elaboration_phase function call.

I have a base_test extended from uvm_test where the end_of_elaboration_phase function is defined i.e., it is printing testbench topology.

I have an extended test where the run_phase of extended test is starting a sequnece on a sequencer.

The extended test does not have end_of_elaboration_phase defined inside it , but still i see the end_of_elaboration_phase of the base test getting called even if the extended test does not have any call like super.end_of_elaboration_phase ?

How is the call to end_of_elaboration_phase in base_test happening without user calling it using super ?

This is same for start_of_simulation_phase as well.

This is a basic principle of virtual methods of an extended class. The UVM calls the base virtual method of uvm_component, which winds up calling the most overridden definition of that object.

I suggest you look at my sessions on SystemVerilog OOP,, especially the second session on inheritance.

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Thanks Dave for your response.

I have got it clarified after going through UVM Base Classes.

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