In reply to jaswanth_b:
As per uvm-1.1, uvm_reg or UVM RAL classes doesn’t shout any error if you perform illegal operation. i mean if you perform write operation on read only register with front door path, then RAL will start the sequence on assigned sequencer, it will not check for register access.
So, Can you elaborate the question? point the exact problem you’re facing along with code(if possible)
Regards,
Mitesh Patel