Blocking property assertion

In reply to ben@SystemVerilog.us:

In reply to ben@SystemVerilog.us:
One more comment: MAny experts on SVA frown upon the use of the first_match() from a style point of view and prefer to use the goto operator if possible. Thus, you could write the following:


// Instead of 
@(posedge clk) $fell(X) ##0 (##[1:$] (X == 1)[*2]) |-> ##2 (1, pass_action);
// Write
@(posedge clk) $fell(X) ##0 X==1[->1] ##1 X==1 |-> ##2 (1, pass_action);

Ben SystemVerilog.us

This does not seem to me the same. With first_match, I doubt it won’t fail even after X==1 ##1 X==0 happens, it will be looking for the next matches without failing. But here I expect that it will fail since X==1[->1] is satisfied and we force it to be X==1; thread dies if X==0. Hence, we will need another fell of X to be started.
And what if we have more complicated sequence than (X == 1)[*2]?