Bit bash sequence for Read only registers

UVM
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1

Hi, I want to understand the expected behaviour when bit bash sequence tries to access a read only register. Do we expect slave error for RO register or the sequence should be able to write to this register & check that read value does not change? If we need to exclude the RO type registers from bit bash sequence, how should one proceed when we have large number of read only registers for IPs that are accessed via subsystem reg block? The IP reg block further has the reg files where registers are located. I am using “uvm_resource_db” to exclude these registers.

2

I recommend letting the bit bash sequence run on all registers including RO registers, as this verifies that they actually do behave as read-only. This approach requires less maintenance and gives you better verification coverage.

However, if you must exclude them (perhaps to reduce simulation time for very large register maps), the uvm_resource_db approach you’re already using is a good solution. Just make sure to:

  1. Automate the exclusion process based on register access type.
    A. If you have many RO regs, maybe put them in a file and have the seq read the file and exclude what’s inside.
    B. If you don’t have many, you can do it by going:
//in your base_test, common_setup, etc.
reg_model.get_registers(all_regs); 

foreach (all_regs[i]) begin
    if (all_regs[i].get_access() == "RO") begin
    uvm_resource_db#(bit)::set({"REG::", all_regs[i].get_full_name()}, "NO_REG_TESTS", 1, null);
  1. Document which registers are being excluded
  2. Ensure you have other tests that verify RO registers properly maintain their values

Hope this helps!

3

Thank you, this helps. I will include the read only registers in the test.